- G. Posser, S. S. Sapatnekar, and R. Reis, Electromigration Inside Logic Cells:Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS, Springer, Boston, MA, 2017.
- A. Srivastava, S. S. Sapatnekar, B. Shi, and Y. Zhang, Thermally-Informed Design of Microelectronic Components, (part of The Encyclopedia of Thermal Packaging), World Scientific Publishing, Singapore, 2015.
- Y. Xie, J. Cong, and S. Sapatnekar, editors, Three-Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures, Springer, Boston, MA, 2010.
- C. J. Alpert, D. P. Mehta, and S. S. Sapatnekar, editors, Handbook of Algorithms for VLSI Physical Design Automation, CRC Press, New York, NY, 2008.
- P. Saxena, R. S. Shelar, and S. S. Sapatnekar, Routing Congestion in VLSI Circuits, Springer, Boston, MA, 2007.
- D. J. Lilja and S. S. Sapatnekar, Designing Digital Computing Systems with Verilog, Cambridge University Press, Cambridge, UK, 2005.
- S. S. Sapatnekar, Timing, Kluwer Academic Publishers, Boston, MA, 2004.
- B. Lu, D.-Z. Du, and S. S. Sapatnekar, editors, Layout Optimization in VLSI Design, Kluwer Academic Publishers, Boston, MA, 2001.
- N. Maheshwari and S. S. Sapatnekar, Timing Analysis and Optimization of Sequential Circuits, Kluwer Academic Publishers, Boston, MA, 1999.
- S. S. Sapatnekar and S. M. Kang, Design Automation for Timing-Driven Layout Synthesis, Kluwer Academic Publishers, Boston, MA, 1993.