Book chapters

  1. J. Cohn, R. Harjani, M.-H. Lin, R. A. Rutenbar, and S. S. Sapatnekar, "Layout tools for analog integrated circuits and mixed-signal systems-on-chip: A survey," in Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology, 3rd ed., CRC Press, Boca Raton, FL, 2026.
  2. V. A. Chhabria, J. Cortadella, and S. S. Sapatnekar, "Static Timing Analysis," in Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology, 3rd ed., CRC Press, Boca Raton, FL, 2026.
  3. V. A. Chhabria and S. S. Sapatnekar, "Deep Learning for Power Delivery Network and Thermal Analysis," in Machine Learning Applications in Electronic Design Automation, J. Hu and H. Ren, eds., Springer, New York, NY, 2022.
  4. S. M. Burns, H. Chen, T. Dhar, R. Harjani, J. Hu, N. Karmokar, K. Kunal, Y. Li, Y. Lin, M. Liu, M. Madhusudan, P. Mukherjee, D. Z. Pan, J. Poojary, S. Ramprasath, S. S. Sapatnekar, A. K. Sharma, W. Xu, S. Yaldiz, and K. Zhu, "Machine Learning for Analog Layout," in Machine Learning Applications in Electronic Design Automation, J. Hu and H. Ren, eds., Springer, New York, NY, 2023.
  5. K. M. Barijough, L. Huang, I-H. Hou, S. S. Sapatnekar, J. Hu, and A. Gerstlauer, “Exploiting Approximations in Real-Time Scheduling,” in Approximate Computing Techniques, A. Bosio, D. Ménard, O. Sentieys, eds., Springer, Cham, Switzerland, 2022.
  6. J. Cortadella and S. S. Sapatnekar, “Static Timing Analysis,” in Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology, 2nd ed., L. Scheffer, L. Lavagno, and G. Martin, eds., pp. 6-1 – 6-17, CRC Press, Boca Raton, FL, 2016.
  7. P. Zhou and S. S. Sapatnekar, “3D Placement and Routing,” in Physical Design for 3D Integrated Circuits, A. Todri-Sanial and C. S. Tan, eds., CRC Press, Boca Raton, FL, 2015.
  8. S. S. Sapatnekar, “Power Grid Analysis,” in Encyclopedia of Algorithms, M.-Y. Kao, ed., Springer, Boston, MA, 2015.
  9. S. S. Sapatnekar, “Statistical Timing Analysis,” in Encyclopedia of Algorithms, M.-Y. Kao, ed., Springer, Boston, MA, 2015.
  10. S. S. Sapatnekar, “Statistical Design of Integrated Circuits,” in Low-Power Variation-Tolerant Design in Nanometer Silicon, S. Bhunia and S. Mukhopadhyay, eds. Springer, Boston, MA, 2011.
  11. S. S. Sapatnekar, “Thermal and Power Delivery Challenges in 3D ICs,” in Three-Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures, Y. Xie, J. Cong, and S. Sapatnekar, eds., Springer, Boston, MA, 2010.
  12. S. S. Sapatnekar, “Thermal Via Insertion and Thermally Aware Routing in 3D ICs,” in Three-Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures, Y. Xie, J. Cong, and S. Sapatnekar, eds., Springer, Boston, MA, 2010.
  13. S. S. Sapatnekar, “Computer-Aided Design for 3D Circuits,” in 3D IC Integration: Technology and Applications, P. Ramm, C. Bower, P. Garrou, eds., Wiley-VCH, Weinheim, Germany, 2008.
  14. K. Bazargan and S. S. Sapatnekar, “Physical Design for 3D Circuits,” in The Handbook of Algorithms for VLSI Physical Design Automation, C. J. Alpert, D. P. Mehta, and S. S. Sapatnekar, eds., CRC Press, 2008.
  15. F. Liu and S. S. Sapatnekar, “Metrics Used in Physical Design,” in The Handbook of Algorithms for VLSI Physical Design Automation, C. J. Alpert, D. P. Mehta, and S. S. Sapatnekar, eds., CRC Press, 2008.
  16. S. S. Sapatnekar, “Static Timing Analysis,” in Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology, L. Scheffer, L. Lavagno, and G. Martin, eds., CRC Press, Boca Raton, FL, 2006.
  17. S. S. Sapatnekar, “Convex Optimization,” in The Wiley Encyclopedia of Computer Science and Engineering, J. G. Webster, ed., John Wiley and Sons, New York, NY (in press).
  18. J. Hu and S. S. Sapatnekar, “Non-Hanan Optimization for Global VLSI Interconnect,” in Layout Optimizations in VLSI Design, B. Lu, D.-Z. Du, and S. S. Sapatnekar, ed., Kluwer Academic Publishers, Boston, MA, 2001.
  19. S. S. Sapatnekar, “Circuit Optimization,” in The Wiley Encyclopedia of Electrical and Electronics Engineering, J. G. Webster, ed., John Wiley and Sons, New York, NY, 2001.
  20. S. S. Sapatnekar, “Convex Optimization,” in The Wiley Encyclopedia of Electrical and Electronics Engineering, J. G. Webster, ed., Vol. 4, John Wiley, New York, NY, 1999.
  21. S. S. Sapatnekar, “Design by Optimization,” in The Circuits and Filters Handbook, ed. W.-K. Chen, CRC Press, 1995.